The present invention relates generally to a phase change memory device and a method for manufacturing the same, and more particularly, to a phase change memory device in which the contact resistance of heaters is decreased and the amorphous phase of a phase change layer can occur in a stable manner and a method for manufacturing the same.
Memory devices are typically grouped into volatile random access memory (RAM) in which data is lost when power is interrupted, and non-volatile read-only memory (ROM) in which stored data is maintained even when power is interrupted. Examples of volatile RAM include dynamic RAM (DRAM) and static RAM (SRAM), and examples of non-volatile ROM include flash memory devices such as electrically erasable and programmable ROM (EEPROM).
DRAM is considered an excellent memory device and has many desirable characteristics. However, DRAM must have high charge storing capacity. In order to obtain a high charge storing capacity, the surface area of certain electrodes in the DRAM must be increased; however, if the surface area of the electrodes is increased it is difficult to achieve a high level of integration. Further, in a flash memory device two gates are stacked on each other, and thus a high operation voltage relative to a power supply voltage is required. Therefore, a separate booster circuit is necessary in order to generate the voltage necessary for write and delete operations, which in turn makes it difficult to achieve a high level of integration.
With these constraints in mind, efforts have been made to develop a memory device having a simple configuration and capable of accomplishing a high level of integration while retaining the desirable characteristics of a non-volatile memory device. Recently, phase change memory devices have been gaining popularity. In the phase change memory device, a phase change (crystalline state to amorphous state) occurs in a phase change layer interposed between a bottom electrode and a top electrode when a current flow is applied to and flows between the bottom electrode and the top electrode. The amorphous and crystalline states have different resistances, and using this phenomenon information stored in a cell can be recognized using the medium of the resistances of the crystalline state and the amorphous state.
An extremely important factor that must be considered when developing a phase change memory device is the reduction of programming current. In order to reduce programming current, the cell switching elements of phase change memory devices are configured using vertical PN diodes in place of NMOS transistors. The vertical PN diodes have increased current flow when compared to the NMOS transistors, and therefore programming current can be reduced and the size of cells can be decreased. As such, the vertical PN diodes can be advantageously applied to allow for higher integration in a phase change memory device.
In the phase change memory device, a phase change occurs at the interface between a heater and a phase change layer. Therefore, in order to reduce programming current, the area of the interface must be decreased. To this end, it is necessary to decrease the size of the heater.
In the phase change memory device, when reset programming is implemented (that is, when the phase change layer is quenched after being melted), heat transfer occurs toward the area of the heater. It is therefore necessary to quickly decrease the temperature of the heater so that the change into the amorphous phase is stable and a reset state having high resistance can be easily formed. In order to reduce programming current, it is advantageous to decrease the size of the heater. However, if the size of the heater is decreased, heat cannot be quickly transferred to the heater, and the reset state having high resistance cannot be easily formed. Typically, a heater is formed to have a small width in the range of 10˜20 nm and a relatively substantial height of 100 nm.
In this situation, the aspect ratio (which is in the range of 5˜10) is substantial, and a problem is caused in that the size of the lower end of a contact hole (in which the heater is to be formed) decreases. As the contact size of the lower end of the heater decreases, the contact resistance increases. Thus, even when the current flow through the cell switching element is increased, the contact resistance between the heater and the cell switching element increases, and thus current flow through the heater decreases.
Heat transfer does not occur quickly when the phase change layer is quenched, and therefore when the height of the heater is decreased the phase change layer may be placed under a partial crystalline state rather than a complete amorphous state so that the reset state having high resistance cannot be formed easily. Conversely, when the height of the heater is increased, the contact resistance at the lower end of the heater increases such that the contact resistance is greater than the set resistance in the crystalline state of the phase change layer.